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October 19th, 2009 | Tags: ASIC, EDA, FPGA, quality, verification | Category: Business, EDA

The formal verification market is still untapped

Functional verification is a major bottleneck in the chip design cycle. Any misstep in closing the functional correctness of a digital system costs millions of dollars in redesign, additional testing, and silicon respins. One can argue at length about its actual cost, but people in the industry usually agree that functional verification takes between [...]

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October 15th, 2009 | Tags: Altera, FPGA, Xilinx | Category: Business, FPGA

What to read in Xilinx’ and Altera’s third quarter results

This week Xilinx and Altera released their September results (Q2FY10 and Q3FY09 respectively). The bottom line is shown below (all numbers in $M).

Source: Xilinx and Altera financial reports, and Yahoo! Finance

Xilinx’ quarterly income of $64M (0.23$/share) beats Wall Street’s expectation of 0.19$/share. Altera’s quarterly income of $56.7M (0.19$/share) meets Wall [...]

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September 15th, 2009 | Tags: EDA, FPGA, startup | Category: Business, EDA, FPGA

Why FPGA startups keep failing

The FPGA market has been entrenched in a duopoly for a number of years now.  In 2008, according to Gartner Inc., Xilinx Inc. and Altera Corp. hold together 87% of the market of programmable logic (51.2% and 35.5% respectively).  The rest of the market is covered mostly by Actel Corp. and Lattice Semiconductor Corp., [...]

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