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In March 2010, exactly a year ago, Tabula announced its product, the 40-nm ABAX device. The device promised a little revolution with its virtual 3D architecture, based on time multiplexing and continuous reconfiguration of its logic. At the time I mirrored Tabula’s announcement with Tier Logic’s, another PLD startup. I wondered whether Tabula could be [...] [...] Continue reading Tabula closed $108M, they’re for real. Right? A month ago I stumbled upon Plunify, a startup that gives a fresh twist to EDA. Founded by HarnHua Ng and Kirvy Teo and established in Singapore, Plunify provides online access to various FPGA synthesis tools in the cloud. Through a slick web 2.0 interface, the user submits its design, which is then synthesized for [...] [...] Continue reading Plunify, a glimpse at EDA in the cloud Systems on Chip (SoCs) integrate increasingly complex hardware features with even more complex software applications, which makes validating SoCs a challenging task. FPGA-based prototyping has become an increasingly popular way of validating SoCs, for good reasons: FPGA devices have enough capacity to fit complex ASICs, and run fast enough to interact with real world interface [...] [...] Continue reading Meet InPA, a newcomer in FPGA-based prototyping It’s official: Tier Logic will cease to be in business on Friday July 16, 2010. The company has been trying to close its second round of funding, but it became clear last week that no short-term funding from a new VC would come, despite some due diligence by two lead investors. Since Tier Logic’s existing [...] [...] Continue reading RIP Tier Logic Xilinx announced that it signed a multi-year strategic licensing agreement to use Oasys’ synthesis. What does that mean for the FPGA and EDA community? Oasys’ product, RealTime Designer, is claimed to be 10x-60x faster than the competition. Among other things, it uses AIG-based optimization. This technology is best illustrated by UC Berkeley’s ABC synthesis: several [...] [...] Continue reading Who should worry about Xilinx and Oasys partnership? Another FPGA startup met the fate of so many others: Abound Logic is reported to have shut down this week, Wednesday June 2nd, 2010. Abound logic, previously known as M2000, was founded by three EDA veterans who had previously started Meta Systems. Meta Systems developed the industry’s first emulation system based on custom FPGAs, which [...] [...] Continue reading RIP Abound Logic A FPGA company makes revenue with the hardware: it sells its device, and gives away its design tools –synthesis, place-and-route. Yet the EDA industry has had success with its own (non-free) FPGA synthesis solutions. For good reasons: in its days, Synplicity’s Synplify was the best FPGA synthesis out there. Synopsys acquired Synplicity two years ago, [...] [...] Continue reading Is FPGA a sustainable market for EDA? The past two weeks were pretty interesting if you follow FPGAs. Yes, Xilinx and Altera kept upping their target to Wall St., but that is not where the excitement came from. It came from the recent announcements of two startups, both created in 2003 and heavily funded. Tabula released its long-awaited device, which goes by [...] [...] Continue reading Can Tabula and Tier Logic be successful? ICCAD’09 was a fairly good vintage. It started Monday morning with an excellent keynote from Hamid Pirahesh about cloud computing. The same day in the afternoon, a more EDA-focused discussion was initiated by Jim Hogan and Paul McLellan (slides can be found here), asking the question “What EDA needs to change for 2020 success?” Paul [...] [...] Continue reading What EDA needs to change for 2020 success? Last week I wrote a post discussing Xilinx and Altera Q3’09 results, and I mentioned Xilinx’ operation margin consistently trailing Altera’s by 3-4%. I had a few emails regarding that gap, and why that gap would be closed eventually. Let me address this topic with this post. Comparing the yearly fiscal exercises directly would be [...] [...] Continue reading How can Xilinx improve its bottom line |
 
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